Language Selection

English French German Italian Portuguese Spanish

RISC-V: Western Digital, Freedom and Codasip

Filed under
Hardware
OSS

More on Western Digital

  • Western Digital To Open-Source The "SweRV" RISC-V Core In 2019

    More than a year ago Western Digital talked up how they would begin designing RISC-V cores and shipping them in devices and that is indeed panning out. The company has unveiled their new SweRV core and plans to open-source it in 2019.

    At the RISC-V Summit, Western Digital talked about their continued investment into this royalty-free, open-source processor ISA. Their current RISC-V design is dubbed SweRV and is a 32-bit, 2-way super-scalar design that features a 9-stage pipeline core and clocks up to 1.8GHz and manufactured on a 28nm process. Western Digital plans to use SweRV within flash controllers / storage devices and other embedded designs.

The Libre RISC-V Vulkan Accelerator

  • The Libre RISC-V Vulkan Accelerator Will Be Targeting 25 FPS @ 720p, 5~6 GFLOPs

    For those interested in the proposed quad-core RISC-V Libre SoC that is intended to go in-step with the Rust-written Kazan for offering Vulkan support, the initial performance target has now been shared.

    While keeping in mind the Libre RISC-V effort is still very young into its endeavor, the performance target they are hoping for is 1280 x 720 25 fps, 100 Mpixels/sec, 30 Mtriangles/sec, 5-6 GFLOPs, according to their new Libre RISC-V M-Class page. Of course, that's very low by today's standards for GPUs and even for licensable graphics core IP available to embedded/mobile vendors, especially with the Libre RISC-V if everything pans out probably not premiering until 2020 at the earliest. But while the performance may be severely limited compared to what's currently available, their differentiation again is on being a "100% libre" design built atop the royalty-free RISC-V processor ISA.

Microchip

  • Microchip – RISC-V SoC FPGA architecture brings real-time to Linux allowing developers to innovate

    Microchip, via its Microsemi Corporation subsidiary, has extended its Mi-V ecosystem with a new class of SoC FPGAs. The new family joins what is claimed to be the industry’s lowest power mid-range PolarFire FPGA family with a total microprocessor subsystem based on the open, royalty-free RISC-V Instruction Set Architecture.

    The company’s new PolarFire SoC architecture brings real-time deterministic AMP capability to Linux platforms in a multi-core coherent CPU cluster. The SoC architecture, developed in collaboration with SiFive, emphasises a flexible 2MB L2 memory subsystem that can be configured as a cache, scratchpad or direct access memory. This enables designers to implement deterministic real-time embedded applications simultaneously with a rich operating system for a variety of thermal and space-constrained applications in collaborative, networked IoT systems.

    The SoC includes extensive debug capabilities incorporating instruction trace, 50 breakpoints, passive run-time configurable AXI bus monitors and FPGA fabric monitors, in addition to the company’s built-in two-channel logic analyser, SmartDebug.

PCQ Bureau

  • Industry’s first RISC-V SoC FPGA architecture brings real-time to Linux [Ed: PCQ Bureau ‘plagiarises’ a press release, edits it mildly, then pretends it’s a “news” “report” and calls itself a “news” site (filed under “NEWS”)]

    In a new era of computing driven by the convergence of 5G, machine learning and the internet of things (IoT), embedded developers need the richness of Linux-based operating systems. These must meet deterministic system requirements in ever lower power, thermally constrained design environments—all while addressing critical security and reliability requirements.

Western Digital unveils open-source SweRV RISC-V core

  • Western Digital unveils open-source SweRV RISC-V core

    Western Digital has lifted the lid on its first in-house processor, the RISC-V-based SweRV Core, which it is to release under an open source licence.

    That Western Digital has been playing with the open RISC-V instruction set architecture (ISA), using which anyone can produce a processor design without paying a penny in royalties or licensing fees, is no secret: Back in 2017 the company pledged to switch to RISC-V in its storage processing products with a view to shipping a billion cores over the following two years. It's not alone, either: Nvidia has begun transitioning away from proprietary cores to RISC-V to drive input/output in its graphics products, Rambus uses RISC-V in security parts, and it has even found its way into SSD storage controllers.

Western Digital will open source SweRV...

  • Western Digital will open source SweRV RISC-V CPU designs and tools

    On Tuesday, Western Digital, an early adopter and vocal proponent of RISC-V, announced plans to open source their implementation of the RISC-V ISA and associated development resources, providing the ability for the open source community to utilize their implementation of the architecture in their own products as well as iterate on it to meet the needs of their own products.

    SweRV Core EHX1, the first generation of RISC-V processors at Western Digital, is a 32-bit, 2-way superscalar, 9 stage pipeline core capable of clock speeds up to 1.8 GHz, produced on a 28mm CMOS process, at 4.90 CoreMark/MHz, which slightly outperforms ARM Cortex A15 (at 4.72 CoreMark/MHz). For their own products, Western Digital touts it as being fit for "embedded devices supporting data-intensive edge applications, such as storage controllers, industrial IoT, real-time analytics in surveillance systems, and other smart systems." Plans for SweRV Core will be released in Q1 2019.

RISC-V Summit Debuts to Showcase Open Source ISA

  • RISC-V Summit Debuts to Showcase Open Source ISA

    This week there's further proof that RISC-V has arrived. Something over 1,000 professionals, mostly on the hardware side of tech, are attending the first ever RISC-V Summit at the Santa Clara Convention Center in Silicon Valley.

More RISC-V

  • Saving lives with open source, RISC-V and Linux Foundations team up, and more news

    Chip designer ARM pretty much dominates the worlds of embedded systems and the Internet of Things. At least the instruction set architectures (ISA) that underlie those worlds. That could soon change thanks to the RISC-V Foundation teaming up with the Linux Foundation to "to encourage adoption of the open source RISC-V ISA."

    Although the Linux Foundation is better know for its software and IT infrastructure projects, this alliance makes sense according to Rick O’Connor, the RISC-V Foundation's executive director. O'Connor told online publication The Register that the ISA is "where software meets hardware. There's a lot of overlap in our respective ecosystems that will create a fair amount of synergy." The Linux Foundation Jim Zemlin also noted that "RISC-V is a technology that has the potential to greatly advance open hardware architecture."

Western Digital Takes A RISC

  • Western Digital Takes A RISC

    Proponents of RISC-V say that it that enables the diversity of Big Data and Fast Data applications and workloads proliferating in core data centers and in remote and mobile systems at the edge. It provides an alternative to current, standard, general purpose compute architectures. With RISC-V, open standard interfaces can be utilized to enable specialty processing, memory centric solutions, unique storage and flexible interconnect applications. The RISC-V Foundation has a broad ecosystem represented by the significant increase in attendees at the 2018 Summit compared to 2017.

Comment viewing options

Select your preferred way to display the comments and click "Save settings" to activate your changes.

More in Tux Machines

Graphics: AMDGPU, Mesa and Intel

  • AMDGPU Has Late Fixes For Linux 5.0: Golden Register Update For Vega 20, Display Fixes
    There are some last minute changes to the AMDGPU Direct Rendering Manager (DRM) driver for the upcoming Linux 5.0 kernel release. Being past RC7, it's quite late in the cycle but some work has materialized that AMD is seeking to get in ahead of the stable release for improving the Radeon open-source GPU support.
  • Mesa 19.1 Panfrost Driver Gets Pantrace & Pandecode Support To Help Reverse Engineering
    Since being added to Mesa 19.1 at the start of this month, the Panfrost driver has continued speeding along with bringing up this ARM Mali T600/T700/T860 open-source graphics driver support. The latest batch of code was merged overnight, including support for some reverse-engineering helpers.
  • Intel's Shiny Vulkan Overlay Layer Lands In Mesa 19.1 - Provides A HUD With Driver Stats
    As some more exciting open-source Intel Linux graphics news this week besides their new merge request to mainline the Iris Gallium3D driver, over in the Vulkan space they have merged today their overlay layer that provides a heads-up display of sorts for their Linux "ANV" driver. Last month we reported on Intel developing a Vulkan "heads-up display" for their driver to display various statistics to help the driver developers themselves as well as application/game developers. This is akin to Gallium HUD but suited for Vulkan usage rather than OpenGL.
  • Intel Iris Gallium3D Driver Merged To Mainline Mesa 19.1
    Well that sure didn't take long... Less than 24 hours after the merge request to mainline the Intel "Iris" Gallium3D driver was sent out, it's now been merged into the mainline code-base! The Intel Gallium3D driver is now in Mesa Git for easy testing of their next-generation OpenGL Linux driver. Making the day even more exciting for Intel Linux users is this driver's landing comes just minutes after the Vulkan overlay layer HUD was merged for Intel's ANV open-source driver.

today's howtos

Linux Foundation: Mobile World Congress 2019, LF Deep Learning Foundation and Calico/CNCF

  • MEDIA ADVISORY: The Linux Foundation to Participate in Mobile World Congress 2019
    The Linux Foundation, the nonprofit organization enabling mass innovation through open source, will be onsite at Mobile World Congress 2019, February 25-28, in Barcelona, Spain.
  • Ericsson Joins Linux Foundation Deep Learning Group As Premier Member
    The LF Deep Learning Foundation (LF DL), a Linux Foundation that supports and sustains open source innovation in artificial intelligence (AI), machine learning (ML), and deep learning (DL), announces Ericsson has become the newest Premier Member. Ericsson, a global leader in delivering ICT solutions, has been at the forefront of communications technology for 140 years. Ericsson has already begun contributing to the LF Deep Learning Foundation through the Acumos project, working with partners like AT&T, Orange and the broader community to solve complex problems surrounding 5G and IoT through AI and ML. In addition to participating in LF DL, Ericsson is also a member of LF Networking, DPDK, the Cloud Native Computing Foundation and LF Edge Foundation. Ericsson is strongly committed to these future-forward technologies, and to that end the company has built a Global AI Accelerator focused on tackling the complex business problems of today and tomorrow.
  • The Calico cloud
    Calico, which is now a Cloud Native Computing Foundation (CNCF) project, can be used on many clouds. It supports such common cloud APIs as Container Network Interface (CNI), OpenStack Neutron, and libnetwork. Besides Kubernetes, it can also be used with Docker, Mesos, and Rkt. You can natively deploy Calico on Amazon Web Services (AWS), Google Compute Engine, and the IBM Cloud. You can’t use Calico directly on Azure, but you can use Calico policies with the right network setup. You can get started with Calico today. If you need help and support to get Calico into production, Tigera, Calico’s corporate backer, offers service level agreements (SLAs).

Mozilla: OnionShare, Fixed Issues, VR and Localization

  • Secure File Sharing Tool OnionShare 2 Adds Anonymous Dropboxes
    OnionShare 2 has been released after nearly a year of work, adding support for anonymous dropboxes, next generation V3 onion services, and more. OnionShare is an open source GUI tool to securely and anonymously send and receive files of any size using the Tor onion services. It's available for Windows, macOS and Linux. The application starts a web server on your computer, for which it assigns an unguessable Tor web address which can be used by others to download files from your computer, or upload files to your computer (with OnionShare 2), using end-to-end encryption. This is done without signing up for an account or using a third-party file-sharing service (the files are hosted on your computer). Downloading files shared with OnionShare, or sending files to someone running OnionShare in receiver mode requires Tor Browser.
  • They fixed it
    Henri Sivonen solved on January 12, a 15 years old bug! When parsing an HTML document (string), the browser creates a DOM tree with nodes nested into each others. As you can imagine, all browsers have a limit on the depth of the tree to avoid bad memory overflows and crashes. On webcompat.com, we got some reports that some sites were missing content compared to Chrome for example. These sites were reaching the nesting limits of Firefox. The limit has been increased.
  • Mozilla VR Blog: Building an In-Game Editor
    Jingle Smash is a WebVR game where you shoot ornaments at blocks to knock them over. It has multiple levels, each which is custom designed with blocks to form the puzzle. Since you play in a first person perspective 3D, the levels must carefully designed for this unique view point. To make the design proess easier I created a simple in-game 3D editor. While Jingle Smash is similar in concept to Angry Birds there is a big difference. The player sees the level head on from a 3D perspective instead of a side view. This means the player can’t see the whole level at once, requiring completely custom designed levels. Rovio is facing this challenge as well with their upcoming VR version of Angry Birds. The difficult part of editing a 3D game on a desktop is that you don’t really experience the levels the same way they will actually be played. At first I went back and forth from 2D view to my VR headset every time I made a change to a level, even just sliding a few blocks around. As you can imagine this grew very tedious. The ideal tool would let me move objects around in the same mode where I play with them. I needed an in-game editor. So that’s what I built, and I created a minimal UI toolkit in the process.
  • Mozilla Localization (L10N): L10n report: February edition
    We’ve added a new page ahead of the Firefox 66 release. Check in Pontoon and look for firefox/whatsnew_66.lang. To be part of the release, make sure to complete it by March 6. The demo URL is not ready at the moment. We will update you as soon as it becomes available. A small but an important update is in the privacy/index.lang file. The change is urgent so please localize the string as soon as possible. Have you taken a look of the newly designed navigation bar? It was recently rolled out with quite a bit of content to localize. Make it a high priority if it is not localized yet.