CPUs are now moving towards 45 nm submicron lithography. But drams are still working with the old 90 nm lithography(1.6 ghz limit). So, computers are not gaining much speed in computations, when chipset is used for slow drams.

Ideally, FSB should be the same as CPU speed. So that the wait state is zero. L2 cache can have data transfer the same from L1 cache to drams.

The semiconductor industry is divided by functions(or 8" or 12" wafer size). Intel(12" wafer production) should make drams just to have faster computers, not having fast cpu but slow drams(8" wafer production by all the dram manufacturers)?

DDR4 should be on the drawing board with more advanced mux and bus structure for 1 bit dram 8 chip sticks or single 8 bit drams for cellphones.