Devices: New Raspberry Pi 3 Model, Arduino, RISC-V and Android
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New Raspberry Pi 3 Model B+ now on-sale, more power and faster networking
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Raspberry Pi 3 Model B+ Launched: Offers More Power, Faster Networking
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Raspberry PI 3 model B+ Released: Complete specs and pricing
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Arduino Create Platform Can Now Program Linux Internet of Things Devices
The official Arduino development team has today revealed at the Embedded Linux Conference 2018 expansion of a number of architectures supported by its Arduino Create platform for the development of Internet of Things applications. The latest release allows Arduino Create users can manage and program a wide range of popular Linux single-board computers such as the awesome Raspberry Pi which has today received a new addition to its range in the form of the Raspberry Pi 3+, AAEON UP² and BeagleBone as if they were regular Arduino development boards.
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An introduction to RISC-V
LWN has covered the open RISC-V ("risk five") processor architecture before, most recently in this article. As the ecosystem and tools around RISC-V have started coming together, a more detailed look is in order. In a series of two articles, I will look at what RISC-V is and follow up with an article on how we can now port Linux distributions to run on it.
The words "Free and Open RISC Instruction Set Architecture" are emblazoned across the web site of the RISC-V Foundation along with the logos of some possibly surprising companies: Google, hard disk manufacturer Western Digital, and notable ARM licensees Samsung and NVIDIA. An instruction set architecture (ISA) is a specification for the instructions or machine code that you feed to a processor and how you encode those instructions into a binary form, along with many other precise details about how a family of processors works. Modern ISAs are huge and complex specifications. Perhaps the most famous ISA is Intel's x86 — that specification runs to ten volumes.
More importantly, ISAs are covered by aggressive copyright, patent, and trademark rules. Want to independently implement an x86-compatible processor? Almost certainly you simply cannot do that without making arrangements with Intel — something the company rarely does. Want to create your own ARM processor? You will need to pay licensing fees to Arm Holdings up front and again for every core you ship.
In contrast, open ISAs, of which RISC-V is only one of the newest, have permissive licenses. RISC-V's specifications, covering user-space instructions and the privileged instructions are licensed under a Creative Commons license (CC BY 4.0). Furthermore, researchers have determined that all RISC-V instructions have prior art and are now patent-free. (Note this is different from saying that implementations will be open or patent-free — almost certainly the highest end chips will be closed and implementations patented). There are also several "cores" — code that compiles to Verilog and can be programmed into an FPGA or (with a great deal more effort) made into a custom chip — licensed under the three-clause BSD.
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Essential Phone Users Are Finally Getting the Android 8.1 Oreo Update
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How to Get Missing Apps from Your Android Phone to Your Wear Watch
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